It’s Time
for Retym
Our global team is growing!
Our team is growing quickly, with our headquarters in Silicon Valley, California and our design center in Tel Aviv, Israel.
We’re looking for candidates who thrive in a startup environment to make big contributions to a technology positioned to make a difference in data center infrastructure.
The Retym team is a passionate and cohesive group that is always collaborating as we work towards our mission. If you’re interested in joining us, please apply below.
VLSI Design Engineer
About The Position
We are looking for talented and experienced VLIS Design Engineers/Micro-architects.
As an VLIS Design Engineer/Micro-architect, you'll have the opportunity to design highly sophisticated, innovative new cutting edge communication systems from scratch.
In this position you will be responsible for coming up with creative solutions to architectural challenges and crafting the very fine details of the implementation
Requirements
Job requirements:
- 5 years of experience as ASIC/FPGA designer
- Strong Verilog/System-Verilog experience
- Familiar with simulation tools/environments, verification methodologies
- Strong team player, solid interpersonal skills
- Entrepreneurial can-do attitude, self-motivated, able to work independently
- BS/MS in EE/CE from lead universities
Background in one or more of the following domains is an advantage:
- Familiar with advanced design practices (Clock/Voltage domain crossing, Low Power Design, DFT)
- Design DSP of oriented blocks
- Ethernet (100G and above)
- Scripting experience using several of the following: Python, Perl, TCL
Apply for this position
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